1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to an active matrix type of liquid crystal display device.
2. Background Art
An active matrix type of liquid crystal display device includes pixel areas provided on a liquid-crystal-side surface of either one of substrates disposed in opposition to each other with a liquid crystal interposed therebetween, each of the pixel areas being an area surrounded by gate signal lines disposed to be extended in the x direction and to be juxtaposed in the y direction and drain signal lines disposed to be extended in the y direction and to be juxtaposed in the x direction.
Each of the pixel areas includes a switching element to be driven by a gate signal from either one of the gate signal lines, and a pixel electrode to be supplied with a video signal from a drain signal line via the switching element.
Two types of liquid crystal display devices are known. One is a so-called vertical electric field type of liquid crystal display device in which a counter electrode common to each pixel area is formed on the liquid-crystal-side surface of one of substrates so that the optical transmissivity of its liquid crystal is controlled by an electric field generated between the counter electrode and a pixel electrode approximately perpendicularly to the substrates. The other is a so-called in-plane-switching type of liquid crystal display device in which a pixel electrode and an adjacent counter electrode are formed in each pixel area on a substrate on which pixel electrodes are formed, so that the optical transmissivity of its liquid crystal is controlled by an electric field generated between the pixel electrode and the counter electrode approximately in parallel with the substrate.
However, it has been demanded that the gate signal lines or the drain signal lines of such a liquid crystal display device have smaller wiring resistivity to cope with a recent increase in panel size.
In other words, by reducing the wiring resistivity of these signal lines, it is possible to restrain the delay of signals, whereby it is possible to achieve far larger panel sizes.
However, even if the wiring resistivity of these signal lines can be reduced, it is necessary to avoid an increase in the number of manufacturing processes because yield factor decreases.
In addition, in the case where a conductive layer, a semiconductor layer and an insulating layer are stacked in a predetermined pattern on a liquid-crystal-surface side of a substrate, the resultant steep steps are required to be made as smooth as possible in terms of an improvement in the yield factor. This is because a film undergoes climb-over damages in portions where the steps are present.